Cypress Semiconductor Perform CY7C1380D Dokumentacja Pobierz pdf (Strona 5)

Preliminary

1. Getting Started

Tutorial Introduction

This tutorial teaches you how to use SOPC Builder, the Quartus

II software, and the

Nios

II Embedded Design Suite (EDS) to implement a digital picture viewer in a

Cyclone III FPGA. In this tutorial, you build a processor-based hardware system in

programmable logic for the Nios II Embedded Evaluation Kit, Cyclone

III Edition

(NEEK) and run software on it. The tutorial demonstrates the steps to build complete,

complex embedded designs using the Altera

design software.

1 You must use the specified spelling for names of files, components, and other objects,

for the tutorial design to function correctly with the software provided. For example,

the software application refers to hardware components by the names specified in this

tutorial. If you name a component differently, the software application does not

identify it correctly.

Hardware and Software Requirements

This tutorial requires the following hardware and software:

■ NEEK development board

■ Quartus II software v9.0—FPGA synthesis and compilation tool that contains

SOPC Builder and the MegaCore

IP library, including the Nios II embedded

processor

■ Nios II EDS 9.0—Complete environment for Nios II software development that

includes the Nios II Integrated Development Environment (IDE)

■ The design files for this tutorial

This section describes the following procedures:

1. Acquire the NEEK

2. Install the Design Software

3. Install the USB Device Driver

4. Extract the Tutorial Files

After you complete all these setup and installation requirements, you are ready to

create your first system-level design.

Acquire the NEEK

You can purchase the NEEK by following the instructions on the Nios II Embedded

Evaluation Kit, Cyclone III Edition web page.

1 2 3 4 5 6 7 8 9 10 ... 45 46

Brak uwag

Cypress Semiconductor Perform CY7C1380D Dokumentacja Strona 5