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4–4 Chapter 4: Completing the Quartus II Project

Configure the FPGA

Nios II System Architect Design Tutorial © June 2009 Altera Corporation

Preliminary

7. Use the Up and Down buttons as necessary to ensure the sequence of the files is

correct. This step is necessary to ensure the constraints are applied in the correct

order. Figure 4–3 shows the required file order.

8. Click OK.

The design is ready for compilation.

9. To compile your design, on the Processing menu, click Start Compilation.

The Quartus II software requires a few minutes to compile the design. The design

should compile without errors.

10. When compilation completes, click OK to close the Full Compilation was

successful message.

Compilation produces the .sof file, neek_hw_lab.sof.

Configure the FPGA

Next, use the Quartus II Programmer to download the .sof to the NEEK and configure

the Cyclone III device on the board.

f For more information about the Quartus II Programmer, refer to the Quartus II

Programmer chapter in volume 3 of the Quartus II Handbook.

To configure the FPGA, perform the following steps:

1. On the Tools menu, click Programmer.

Figure 4–3. Settings Dialog Box After Two New Timing Constraint Files Added to Project

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