Cypress Semiconductor Quad HOTLink II CYV15G0404RB Podręcznik Użytkownika Strona 6

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Quad Independent Channel
HOTLink II™ CYV15G0404DXB
Video PHY Demonstration Board
Page 6 of 92
3.0 Demo Board Features
This section highlights the key features of the Quad Independent Channel HOTLink II CYV15G0404DXB Video PHY Demo Board.
Video transport at multiple rates of 270 Mb/s, 360 Mb/s, 540 Mb/s, and 1485 Mb/s
Auto-rate detection
Low-Jitter outputs
Programmable clocking options for different SMPTE data rates
SMPTE scrambler/descrambler functionality implemented in FPGA
4x4 clock header to support multiple clocking options
High-speed USB FX2 microcontroller to configure FPGAs
Configuration of HOTLink II device using Cypress Microsystems PSoC Microcontroller
Reclocking Deserializers
6V DC supply with on-board voltage regulator to prevent noise transfer from external power sources
Interfaces to industry-standard equalizers and cable drivers
LED status indicators
User-friendly GUI
Windows
2000/XP supported.
Figure 2-1. Top View of Video Demo Board
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