Cypress Semiconductor CY7B991 Instrukcja Użytkownika Pobierz pdf (Strona 8)

CY7B991

CY7B992

Switching Characteristics

Over the Operating Range

[2, 13]

(continued)

CY7B991–7 CY7B992–7

Parameter Description Min. Typ. Max. Min. Typ. Max. Unit

NOM

Operating Clock

Frequency in MHz

FS = LOW

[1, 2]

15 30 15 30 MHz

FS = MID

[1, 2]

25 50 25 50

FS = HIGH

[1, 2]

40 80 40 80

[15]

RPWH

REF Pulse Width HIGH 5.0 5.0 ns

RPWL

REF Pulse Width LOW 5.0 5.0 ns

Programmable Skew Unit See

Table 1

SKEWPR

Zero Output Matched-Pair Skew

(XQ0, XQ1)

[16, 17]

0.1 0.25 0.1 0.25 ns

SKEW0

Zero Output Skew (All Outputs)

[16, 18]

0.3 0.75 0.3 0.75 ns

SKEW1

Output Skew (Rise-Rise, Fall-Fall, Same

Class Outputs)

[16, 20]

0.6 1.0 0.6 1.0 ns

SKEW2

Output Skew (Rise-Fall, Nominal-Inverted,

Divided-Divided)

[16, 20]

1.0 1.5 1.0 1.5 ns

SKEW3

Output Skew (Rise-Rise, Fall-Fall, Different

Class Outputs)

[16, 20]

0.7 1.2 0.7 1.2 ns

SKEW4

Output Skew (Rise-Fall, Nominal-Divided,

Divided-Inverted)

[16, 20]

1.2 1.7 1.2 1.7 ns

DEV

Device-to-Device Skew

[14, 21]

1.65 1.65 ns

Propagation Delay, REF Rise to FB Rise –0.7 0.0 +0.7 –0.7 0.0 +0.7 ns

ODCV

Output Duty Cycle Variation

[22]

–1.2 0.0 +1.2 –1.5 0.0 +1.5 ns

PWH

Output HIGH Time Deviation from 50%

[23, 24]

3 5.5 ns

PWL

Output LOW Time Deviation from 50%

[23, 24]

3.5 5.5 ns

ORISE

Output Rise Time

[23, 25]

0.15 1.5 2.5 0.5 3.0 5.0 ns

OFALL

Output Fall Time

[23, 25]

0.15 1.5 2.5 0.5 3.0 5.0 ns

LOCK

PLL Lock Time

[26]

0.5 0.5 ms

Cycle-to-Cycle Output

Jitter

RMS

[14]

25 25 ps

Peak-to-Peak

[14]

200 200 ps

1 2 3 4 5 6 7 8 9 10 11 12 13 14

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