Cypress Semiconductor enCoRe CY7C604XX Instrukcja Użytkownika

enCoRe™ III Low VoltageCY7C603xxCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #: 38-16018 Re

CY7C603xxDocument #: 38-16018 Rev. *D Page 10 of 291E 5E 9E INT_MSK3 DE RW1F 5F 9F DFDBB00DR0 20 # AMX_IN 60 RW A0 INT_MSK0 E0 RWDBB00DR1 21 W AMUXCFG

CY7C603xxDocument #: 38-16018 Rev. *D Page 11 of 29Table 4. Register Map 1 Table: Configuration Space NameAddr(1,Hex)Access NameAddr(1,Hex)Access Name

CY7C603xxDocument #: 38-16018 Rev. *D Page 12 of 29DCB03FN 2C RW TMP_DR0 6C RW AC ECDCB03IN 2D RW TMP_DR1 6D RW AD EDDCB03OU 2E RW TMP_DR2 6E RW AE EE

CY7C603xxDocument #: 38-16018 Rev. *D Page 13 of 29Electrical SpecificationsThis section presents the DC and AC electrical specificationsof the enCoRe

CY7C603xxDocument #: 38-16018 Rev. *D Page 14 of 29Absolute Maximum RatingsOperating TemperatureDC Electrical CharacteristicsDC Chip-Level Specificati

CY7C603xxDocument #: 38-16018 Rev. *D Page 15 of 29DC General Purpose IO SpecificationsThe following tables list guaranteed maximum and minimum specif

CY7C603xxDocument #: 38-16018 Rev. *D Page 16 of 29DC Operational Amplifier SpecificationsThe following tables list guaranteed maximum and minimum spe

CY7C603xxDocument #: 38-16018 Rev. *D Page 17 of 29DC Switch Mode Pump SpecificationsTab le 13 lists guaranteed maximum and minimum specifications fo

CY7C603xxDocument #: 38-16018 Rev. *D Page 18 of 29DC Analog Mux Bus Specifications The following table lists guaranteed maximum and minimum specifica

CY7C603xxDocument #: 38-16018 Rev. *D Page 19 of 29DC Programming SpecificationsThe following table lists guaranteed maximum and minimum specification

CY7C603xxDocument #: 38-16018 Rev. *D Page 2 of 29Figure 1. enCoRe III Low Voltage Block DiagramApplications•Wireless mice• Wireless gamepads• Wireles

CY7C603xxDocument #: 38-16018 Rev. *D Page 20 of 29AC Electrical CharacteristicsAC Chip-Level SpecificationsThe following tables list guaranteed maxim

CY7C603xxDocument #: 38-16018 Rev. *D Page 21 of 29Figure 9. 24-MHz Period Jitter (IMO) Timing DiagramFigure 10. 32-kHz Period Jitter (ILO) Timing Dia

CY7C603xxDocument #: 38-16018 Rev. *D Page 22 of 29AC Operational Amplifier SpecificationsThe following table lists guaranteed maximum and minimum spe

CY7C603xxDocument #: 38-16018 Rev. *D Page 23 of 29AC External Clock SpecificationsThe following tables list guaranteed maximum and minimum specificat

CY7C603xxDocument #: 38-16018 Rev. *D Page 24 of 29AC Programming SpecificationsThe following table lists guaranteed maximum and minimum specification

CY7C603xxDocument #: 38-16018 Rev. *D Page 25 of 29AC I2C SpecificationsThe following tables list guaranteed maximum and minimum specifications for th

CY7C603xxDocument #: 38-16018 Rev. *D Page 26 of 29Figure 12. Definition for Timing for Fast/Standard Mode on the I2C BusPackaging InformationThis sec

CY7C603xxDocument #: 38-16018 Rev. *D Page 27 of 29Figure 14. 32-Lead QFN (5 x 5 mm)Important Note For information on the preferred dimensions for mou

CY7C603xxDocument #: 38-16018 Rev. *D Page 28 of 29© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change wi

CY7C603xxDocument #: 38-16018 Rev. *D Page 29 of 29Document History PageDescription Title: CY7C603xx, enCoRe™ III Low VoltageDocument Number: 38-16018

CY7C603xxDocument #: 38-16018 Rev. *D Page 3 of 29normal operating voltages off a single battery cell, and varioussystem resets supported by the M8C.T

CY7C603xxDocument #: 38-16018 Rev. *D Page 4 of 29• An internal 1.3 voltage reference provides an absolute reference for the analog system.• An integr

CY7C603xxDocument #: 38-16018 Rev. *D Page 5 of 29Application EditorIn the Application Editor you can edit your C language andAssembly language source

CY7C603xxDocument #: 38-16018 Rev. *D Page 6 of 29Figure 5. User Module and Source Code Development FlowsThe next step is to write your main program,

CY7C603xxDocument #: 38-16018 Rev. *D Page 7 of 29Packages/PinoutsThe enCoRe III LV device is available in 28-pin SSOP and 32-pin QFN packages, which

CY7C603xxDocument #: 38-16018 Rev. *D Page 8 of 2932-Pin Part Pinout Table 2. 32-Pin Part Pinout (QFN*)PinNo.TypeName DescriptionCY7C60323-LFXC Device

CY7C603xxDocument #: 38-16018 Rev. *D Page 9 of 29Register ReferenceThis section lists the registers of the enCoRe III LV device. Fordetailed register