Cypress Semiconductor ISR 37000 CPLD Instrukcja Użytkownika Pobierz pdf (Strona 10)

Ultra37000 CPLD Family

Document Number : 38-03007 Rev. *G Page 10 of 43

Logic Block Diagrams

CY37032/CY37032V

LOGIC

BLOCK

B

LOGIC

BLOCK

A

36

16

36

16

Input

Clock/

Input

16 I/Os

16 I/Os

I/O

0

−I/O

15

I/O

16

−I/O

31

4

4

4

16

16

TDI

TCK

TMS

TDO

JTAG Tap

Controller

1

PIM

JTAG

EN

LOGIC

BLOCK

D

LOGIC

BLOCK

C

LOGIC

BLOCK

A

LOGIC

BLOCK

B

36

16

36

16

36

16

36

16

Input

Clock/

Input

16 I/Os

16 I/Os

16 I/Os

16 I/Os

I/O

0

-I/O

15

I/O

16

-I/O

31

I/O

48

-I/O

63

I/O

32

-I/O

47

4

4

4

32

32

TDI

TCK

TMS

TDO

JTAG Tap

Controller

1

PIM

CY37064/CY37064V

[+] Feedback

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 42 43

Ultra37000 CPLD Family 1

Komentarze do niniejszej Instrukcji

Brak uwag