Cypress Semiconductor enCoRe CY7C64215 Instrukcja Użytkownika Strona 6

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CY7C64215
Document Number: 38-08036 Rev. *E Page 6 of 33
Debugger
The PSoC Designer Debugger subsystem provides hardware
in-circuit emulation, enabling the designer to test the program in
a physical system while providing an internal view of the enCoRe
III device. Debugger commands enable the designer to read and
program and read and write data memory, read and write I/O
registers, read and write CPU registers, set and clear break-
points, and provide program run, halt, and step control. The
debugger also enables the designer to create a trace buffer of
registers and memory locations of interest.
Online Help System
The online help system displays online, context-sensitive help
for the user. Designed for procedural and quick reference, each
functional subsystem has its own context-sensitive help. This
system also provides tutorials and links to FAQs and an Online
Support Forum to aid the designer in getting started.
Hardware Tools
In-Circuit Emulator
A low cost, high functionality ICE Cube is available for devel-
opment support. This hardware has the capability to program
single devices.
The emulator consists of a base unit that connects to the PC by
way of a USB port. The base unit is universal which operates with
all enCoRe III devices.
Designing with User Modules
The development process for the enCoRe III device differs from
that of a traditional fixed-function microprocessor. The configu-
rable analog and digital hardware blocks give the enCoRe III
architecture a unique flexibility that pays dividends in managing
specification change during development and by lowering
inventory costs. These configurable resources, called enCoRe
III Blocks, have the ability to implement a wide variety of
user-selectable functions. Each block has several registers that
determine its function and connectivity to other blocks, multi-
plexers, buses and to the I/O pins. Iterative development cycles
permit you to adapt the hardware and software. This substan-
tially lowers the risk of having to select a different part to meet
the final design requirements.
To speed the development process, the PSoC Designer
Integrated Development Environment (IDE) provides a library of
pre-built, pre-tested hardware peripheral functions, called “User
Modules.” User modules make selecting and implementing
peripheral devices simple, and come in analog, digital, and
mixed signal varieties.
The user module library contains the following digital and analog
module designs:
Analog Blocks
Incremental ADC (ADCINC)
Delta Sigma ADC (DelSig)
Programmable Threshold Comparator (CMPPRG)
Digital Blocks
Counters: 8-bit and 16-bit (Counter8 and Counter 16)
PWMs: 8-bit and 16-bit (PWM8 and PWM16)
Timers: 8-bit and 16-bit (Timer8 and Timer 16)
I
2
C Master (I
2
CM)
SPI Master (SPIM)
SPI Slave (SPIS)
Full Duplex UART (UART)
RF (CYFISNP and CYFISPI)
System Resources
Protocols:
USBFS
I2C Bootheader (Boothdr I
2
C)
USB Bootheader (BoothdrUSBFS)
USBUART
Digital System Resources
•E2PROM
•LCD
•LED
7-segment LED (LED7SEG)
Shadow Registers (SHADOWREG)
•Sleep Timer
Each user module establishes the basic register settings that
implement the selected function. It also provides parameters that
enable you to tailor its precise configuration to your particular
application. For example, a Pulse Width Modulator User Module
configures one or more digital PSoC blocks, one for each 8 bits
of resolution. The user module parameters permit the designer
to establish the pulse width and duty cycle. User modules also
provide tested software to cut development time. The user
module application programming interface (API) provides
high-level functions to control and respond to hardware events
at run-time. The API also provides optional interrupt service
routines that is adapted as needed.
The API functions are documented in user module data sheets
that are viewed directly in the PSoC Designer IDE. These data
sheets explain the internal operation of the user module and
provide performance specifications. Each data sheet describes
the use of each user module parameter and documents the
setting of each register controlled by the user module.
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